The understanding and development of the oxidized semiconductor surfaces and oxide-semiconductor interfaces are relevant to many technologies such as passivation of surface defects of outermost device parts and processing of electronics materials as well as manufacturing of insulator-semiconductor interfaces for the metal-oxide-semiconductor-field-effect-transistors (MOSFETs). Perhaps every semiconductor device includes an insulator-semiconductor interface, MOSFET is a good example. Current MOSFETs, used for example in microprocessors, are predominantly based on the Si channel and silicon dioxide (SiO2) and hafnium dioxide (HfO2) gate insulators. These devices are facing their fundamental limits as more powerful components are developed. III-V compound semiconductors such as InAs, InGaAs, InSb and InP are desired channel materials for future MOSFETs, due to superior mobilities of electrons in these materials in comparison to silicon (Si). Therefore, significant efforts have been initiated to produce gate insulator interfaces of III-V channel layers, which are stable and meet commercial device criteria, as the SiO2—Si junction successfully does. However, this great goal, which would lead, for example, to the increased lifetime of devices and energy savings at servers, has not been yet achieved.
One of the main reasons for this is the presence (or formation) of native amorphous III-V surface oxides, which cause Fermi-level pinning via high density of defect states at the semiconductor-insulator interface. So, these native amorphous oxides are detrimental to the transistors. Therefore, a huge amount of work has been done to find the method to passivate III-V surfaces against the reaction with oxygen and formation of amorphous oxides. This is however a very challenging task since it is difficult to avoid the reaction between III-V semiconductor surface and oxygen during the growth of interfaces. For example, during the insulator layer growth, the III-V surfaces usually react with oxygen. So, it is still not known whether avoiding the oxygen reaction during interface growth is possible. However, it is well known that processing of the starting III-V surfaces significantly affects the properties of MOSFETs, and crystalline (or epitaxial) oxide interfaces are highly desired for these devices.
Recently [1], an interesting improvement has been found in the InAs-channel MOSFET of which InAs surface was thermally oxidized in a furnace with an atmospheric pressure conditions. The transmission-electron-microscopy image from this interface shows the formation of crystalline islands of InAsOx. However, the surface of the resulting layer including InAsOx is not long-range ordered and becomes contaminated in the atmospheric preparation conditions used.
In previous vacuum-based experiments [e.g., Ref. 2], it has been found that different surface structures on the starting III-V substrate affect the oxidation and the properties of the resulting III-V surface oxides. The presented III-V surface oxides are amorphous without long-range order. Therefore, any oxidation of III-V surfaces has been commonly considered to be harmful and tried to be avoided.
To recapitulate, the unsolved problem relating to the use of the III-V compound semiconductors in MOSFETs is an amorphous semiconductor-oxide interface (or the lack of enough crystalline oxide-semiconductor interface), which causes harmful effects such as Fermi-level pinning, a detrimental leakage currents, and decrease in the carrier mobilities in the MOSFETs.